Teymourzadeh, Rozita and Othman, Masuri (2006): VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications. Published in: 4th National Technical Postgraguate Symposium, Techpos (20 January 2006): pp. 54-58.
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Abstract
The recursive comb filters or Cascaded Integrator Comb filter (CIC) are commonly used as decimators for the sigma delta modulators. This paper presents the VLSI implementation, analysis and design of high speed CIC filters which are based on a low-pass filter. These filters are used in the signal decimation which has the effect on reducing the sampling rate. It is also chosen because its attractive property of both low power and low complexity since it dose not required a multiplier. Simulink toolbox available in Matlab software which is used to simulator and Verilog HDL coding help to verify the functionality of the CIC filters. Design procedures and examples are given for CIC filter with emphasis on frequency response, transfer function and register width. The implementation results show using Modified Carry Look-ahead Adder for summation and also apply pipelined filter structure enhanced high speed and make it more compatible for DSP applications.
Item Type: | MPRA Paper |
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Original Title: | VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications |
Language: | English |
Keywords: | CIC, sigma delta, Decimation, Comb, recursive, truncation, MCLA |
Subjects: | L - Industrial Organization > L0 - General L - Industrial Organization > L6 - Industry Studies: Manufacturing F - International Economics > F1 - Trade > F14 - Empirical Studies of Trade L - Industrial Organization > L7 - Industry Studies: Primary Products and Construction O - Economic Development, Innovation, Technological Change, and Growth > O1 - Economic Development > O14 - Industrialization ; Manufacturing and Service Industries ; Choice of Technology |
Item ID: | 41944 |
Depositing User: | Dr. Rozita Teymourzadeh |
Date Deposited: | 16 Oct 2012 10:46 |
Last Modified: | 27 Sep 2019 12:30 |
References: | [1]R.E.Crochiere and L.R. Rabiner, Multirate Digital Signal Processing, Engelwood Cliffs, Prentice Hall, New Jersey, 1983. [2]P.P. Vaidyanathan, Multirate Systems and Filter Banks, Engelwood Cliffs, Prentice Hall, New Jersey, 1993. [3]E.B. Hogenauer, An Economical Class of digital filters for Decimation and interpolation, IEEE Transactions on Acoustics, Speech, and Signal Prosessing, Vol. ASSP-29,pp.155-162, April 1981. [4]Sangil Park, Principles of Sigma-delta Modulation for Analog-to-Digital Converters, Motorola Inc, APR8/D Rev.1, 1990 [5]Michael D. Ciletti, Advanced Digital design with the Verilog HDL, Prentice Hall, Department of Electrical and Computer Engineering University of Colorado at Colorado Springs, 2003. [6]Y. Djadi and T. A. Kwasniewski, C. Chan and V. Szwarc, “A high throughput Programmable Decimation and Interpolation Filter”, Proceeding of International Conference on Signal Processing Applications and Technology, pp.1743-1748, 1994. [7]Brian P. Brandt and Bruce A. Wooley, A Low-Power, Area-Efficient Digital Filter for Decimation and Interpolation, IEEE Journal of Solid-State Circuits, Vol. 29, No.6, June 1994. |
URI: | https://mpra.ub.uni-muenchen.de/id/eprint/41944 |